1. Field of the Invention
The present invention relates to a semiconductor circuit device, and to a system for testing a semiconductor apparatus.
2. Description of the Related Art
It is known for semiconductor storage apparatuses to be tested with the aid of test equipment.
When testing semiconductor storage apparatuses, the accuracy of the interface timing, inter alia, is also checked, and, in particular, the so-called setup time and hold time. However, in the case of high-frequency operation and testing of a semiconductor storage apparatus, for example using a clock frequency of more than 500 MHz, it becomes increasingly more difficult to check the accuracy of the interface timing, since test apparatuses must be used which can produce such high clock frequencies with high accuracy, and can also measure short times with high accuracy.
FIG. 6 illustrates one arrangement for testing a semiconductor storage apparatus. The semiconductor storage apparatus 1 to be tested is arranged on a test board 2. The test apparatus 3 is connected via lines 4 to the semiconductor storage apparatus 1 to be tested. As can be seen in the figure, a dedicated signal line is in each case required for signals which are sent from the test apparatus 3 to the semiconductor storage apparatus 1 (DQ and DQS) and for signals which are sent from the semiconductor storage apparatus 1 to the test apparatus 3 (DQ* and DQS*).
When using a test set for production of the test signals, a calibration process must be carried out owing to the physical distance between the test apparatus 3 and the semiconductor storage apparatus to be tested. Furthermore, the timing of the test apparatus is subject to stringent accuracy requirements owing to the propagation delay from the test apparatus to the semiconductor storage apparatus to be tested. Furthermore, it is necessary to provide a large number of appropriate, high-precision tester channels.
It is also known for a separate device, which is connected to the test set and to the semiconductor storage apparatus, to be provided in the vicinity of the semiconductor storage apparatus to be tested. An apparatus such as this is used in order to use signals which comply with the required accuracy for testing of the semiconductor storage apparatus.
One such device is known, for example, from DE 101 22 619 C1. In this case, a clock signal which is received from an external test set at a low frequency has its frequency multiplied by a specific factor in order to produce the working clock signal.
DE 100 34 899 C1 describes a semiconductor circuit module which has a time reference circuit. The time reference circuit comprises a delay locked loop circuit.
However, these apparatuses have the disadvantage that the design is very complex, and the production of the apparatuses is thus costly.